Embedded concurrent computing architecture using FPGA

Muataz H. Salih, R. Badlishah Ahmad, Abid Yahya, Mohd Rizal Arshad

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Simultaneous multithreading by use of embedded parallel systolic filters is a novel technological approach to achieve multiprocessing. It is important for the designers to ensure that FPGA chips that are fully operational. There is great emphasis on the design area, performance, challenges and opportunities posed by multi-tasking as a result of the huge number of inputs and outputs required by the design. The Embedded Concurrent Computing Architecture proposed is implemented on a FPGA chip. There are expected speedups in the implementation based on the results shown in this proposal. Synthesis has been used in gathering of the results with implementation being achieved by use of low complexities in the FPGA usage and frequency. The efficiency of the new model is over 75% with the performance of the design is secured for a tolerance of 2 m for 25 m range. The Particle filter tolerance is less than 1m with an operating frequency of 212 MHz or thereabouts.

Original languageEnglish
Title of host publicationProceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012
Pages439-444
Number of pages6
DOIs
Publication statusPublished - Dec 1 2012
Event2012 7th International Conference on System of Systems Engineering, SoSE 2012 - Genova, Italy
Duration: Jul 16 2012Jul 19 2012

Other

Other2012 7th International Conference on System of Systems Engineering, SoSE 2012
CountryItaly
CityGenova
Period7/16/127/19/12

Fingerprint

Field programmable gate arrays (FPGA)
Multitasking

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering

Cite this

Salih, M. H., Ahmad, R. B., Yahya, A., & Arshad, M. R. (2012). Embedded concurrent computing architecture using FPGA. In Proceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012 (pp. 439-444). [6384129] https://doi.org/10.1109/SYSoSE.2012.6384129
Salih, Muataz H. ; Ahmad, R. Badlishah ; Yahya, Abid ; Arshad, Mohd Rizal. / Embedded concurrent computing architecture using FPGA. Proceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012. 2012. pp. 439-444
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Salih, MH, Ahmad, RB, Yahya, A & Arshad, MR 2012, Embedded concurrent computing architecture using FPGA. in Proceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012., 6384129, pp. 439-444, 2012 7th International Conference on System of Systems Engineering, SoSE 2012, Genova, Italy, 7/16/12. https://doi.org/10.1109/SYSoSE.2012.6384129

Embedded concurrent computing architecture using FPGA. / Salih, Muataz H.; Ahmad, R. Badlishah; Yahya, Abid; Arshad, Mohd Rizal.

Proceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012. 2012. p. 439-444 6384129.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Salih MH, Ahmad RB, Yahya A, Arshad MR. Embedded concurrent computing architecture using FPGA. In Proceedings - 2012 7th International Conference on System of Systems Engineering, SoSE 2012. 2012. p. 439-444. 6384129 https://doi.org/10.1109/SYSoSE.2012.6384129